12-bit ccd signal processor with precision timing data sheet ad9971 rev. spb document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2006C2014 analog devices, inc. all rights reserved. technical support www.analog.com features 1.8 v analog and digital core supply voltage serial data link with reduced range lvds outputs correlated double sampler (cds) with ?3 db, 0 db, +3 db, and +6 db gain 6 db to 42 db, 10-bit variable gain amplifier (vga) 12-bit, 50 mhz adc black level clamp with variable level control complete on-chip timing generator precision timing core with 310 ps resolution @ 50 mhz on-chip, 3 v horizontal and rg drivers 6 mm 6 mm, 40-lead lfcsp_vq applications digital video camcorders professional/high end digital cameras broadcast cameras industrial high speed cameras high speed data acquisition systems general description the ad9971 is a highly integrated ccd signal processor for high speed digital video camera applications. specified at pixel rates of up to 50 mhz, the ad9971 consists of a complete analog front end with analog-to-digital conversion combined with a programmable timing driver. the precision timing ? core allows adjustment of high speed clocks with 310 ps resolution at 50 mhz operation. the ad9971 also contains a reduced range lvds interface for the data outputs. the analog front end includes black level clamping, cds, vga, and a 50 msps, 12-bit adc. the timing driver provides the high speed ccd clock drivers for rg, hl, and h1 to h4. operation is programmed using a 3-wire serial interface. packaged in a space-saving 6 mm 6 mm, 40-lead lfcsp_vq, the ad9971 is specified over an operating temperature range of ?25c to +85c. functional block diagram ad9971 cds vga clamp cli vref 6db to 42db 4 rg 3v input 1.8v output h1 to h4 reft refb internal clocks hd vd sl sck sdata dout0p dout1p hl dout0n dout1n tclkp tclkn ?3, 0, +3, +6db gpo1 gpo2 ccdinp ccdinm reduced range lvds output precision timing generator horizontal drivers 12-bit adc internal registers sync generator ldo reg 0 6053-001 iovdd ldoout figure 1. for more information about the ad9971 , contact analog devices, inc. via email at: afe.ccd@analog.com .
ad9971 data sheet rev. spb | page 2 of 2 notes ? 2006 C 2014 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06053f - 0 - 7/14(spb)
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